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ARM Guide

The ARM company licenses its high-performance, low-cost, power-efficient, reduced instruction-set computing (RISC) microprocessor, peripheral, and system-chip designs to leading international electronics companies. More than 70 semiconductor companies license ARM CPU technology. The ARM Partnership provides standard development tools, operating systems, optimized application software, and design services for ARM core-based designs.

The ARM microprocessor range provides solutions for the following applications:

  • Open platforms running complex operating systems for wireless, consumer and imaging applications.
  • Embedded, real-time systems for mass storage, automotive, industrial, and networking applications.
  • Secure applications, including smart cards and Single Inline Memory (SIM) modules.

The ARM Instruction Set Architecture (ISA) includes several technology extensions and features, such as THUMB technology, that enable optimum functionality and performance.

The following table describes features of each supported ARM ISA microprocessor family.

Microprocessor family Description
v4 ARM v4 non-interworking.
v4T The ARM v4T architecture introduced the Thumb instruction set, which enables software to be coded using short 16-bit instructions. This provides typical memory savings of up to 35%, over the equivalent 32-bit code, while retaining all the benefits of a 32-bit system, such as access to a full 32-bit address space. Because you can move between Thumb and the normal ARM state with little overhead, you can use Thumb on a routine-by-routine basis to gain complete control over performance and code-size optimization.
Thumb Thumb is an extension to the 32-bit ARM architecture. The Thumb instruction set features a subset of the most commonly used 32-bit ARM instructions compressed into 16-bit wide operations codes. On execution, these 16-bit instructions decompress transparently to full 32-bit ARM instructions in real time without performance loss. You can use both 16 bit Thumb and 32 bit ARM instructions sets, and selectively emphasize speed or code size performance on a functional level.
v5TE In 1999, the ARM v5TE architecture introduced the ARM DSP instruction set extensions. The extensions provide up to a 70% increase in speed for audio DSP applications. The DSP instruction set extensions deliver enhanced 32-bit arithmetic capabilities in a single general purpose CPU, providing improved performance and flexibility.
Intel XScale Intel designed XScale to optimize low power consumption and high performance processing for a wide range of Internet devices for the same microprocessor core. The architecture enables a wide range of devices, from handheld Internet devices to enterprise Internet infrastructure products, to process-rich content at all stages of the Internet. XScale architecture is compliant with the ARM Version 5TE ISA instruction set, excluding the floating-point instruction set.

See Also

About Supported Microprocessors | ARM Calling Sequence Specification | THUMB-enabled ARM Implementation | ARM Assembler

 Last updated on Thursday, April 08, 2004

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